2022•The Journal of Korean Institute of Electromagnetic Engineering and ScienceOpen access

A W-Band Power Amplifier Design for Radar Transmitter Using 28-nm CMOS Process

Se-Jun Park, Seuk-Won Kang, Kyu-Jin Choi, Byung‐Sung Kim

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Abstract

In this paper, we present a W-band power amplifier using a 28-nm CMOS process for radar applications. The designed amplifier consists of a two-stage driver amplifier and last-stage power amplifier. The driver amplifier uses a differential common-source topology, and the power amplifier adopts a differential cascode topology. Both the driver amplifier and power amplifier utilize the neutralization technique at the common-source stage for stability and sufficient power gain. Each interstage of the amplifier used a transformer for impedance matching. The W-band signal applied to the first driving amplifier is supplied 14 GHz to 16 GHz external signal source multiplied by 6 using the internal multiplier, the power amplifier achieved 14.9 dBm output power, and the 3-stage amplifier consumed 262 mW of DC power. The 1 dB-bandwidth is 10 GHz from 85 GHz to 95 GHz. The core size of the 3-stage amplifier is 110 μm × 300 μm.

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In this paper, we present a W-band power amplifier using a 28-nm CMOS process for radar applications. The designed amplifier consists of a two-stage driver amplifier and last-stage power amplifier. The driver amplifier uses a differential common-source topology, and the power amplifier adopts a differential cascode topology. Both the driver amplifier and power amplifier utilize the neutralization technique at the common-source stage for stability and sufficient power gain. Each interstage of the amplifier used a transformer for impedance matching. The W-band signal applied to the first driving amplifier is supplied 14 GHz to 16 GHz external signal source multiplied by 6 using the internal multiplier, the power amplifier achieved 14.9 dBm output power, and the 3-stage amplifier consumed 262 mW of DC power. The 1 dB-bandwidth is 10 GHz from 85 GHz to 95 GHz. The core size of the 3-stage amplifier is 110 μm × 300 μm.

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Available abstract

In this paper, we present a W-band power amplifier using a 28-nm CMOS process for radar applications. The designed amplifier consists of a two-stage driver amplifier and last-stage power amplifier. The driver amplifier uses a differential common-source topology, and the power amplifier adopts a differential cascode topology. Both the driver amplifier and power amplifier utilize the neutralization technique at the common-source stage for stability and sufficient power gain. Each interstage of the amplifier used a transformer for impedance matching. The W-band signal applied to the first driving amplifier is supplied 14 GHz to 16 GHz external signal source multiplied by 6 using the internal multiplier, the power amplifier achieved 14.9 dBm output power, and the 3-stage amplifier consumed 262 mW of DC power. The 1 dB-bandwidth is 10 GHz from 85 GHz to 95 GHz. The core size of the 3-stage amplifier is 110 μm × 300 μm.

Key concepts: Direct-coupled amplifier, Linear amplifier, RF power amplifier, Operational transconductance amplifier, Power-added efficiency, Cascade amplifier, Fully differential amplifier, FET amplifier

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