Digital predistortion implementation for Frequency Hopping System

Power amplifiers possess a tradeoff between linearity and efficiency. This problem magnifies in a frequency hopping system. As carrier frequency changes, the non-linearity also varies. Even the effect of memory on the non-linearity fluctuates. Non-linearity mitigation techniques like digital predistortion, help in obtaining linearity, alongwith the most efficient output. However, its real-time implementation is very challenging in terms of time and FPGA resources. This paper states a methodology for using the memory polynomial-based predistorter. The resources used and time taken is portrayed for the FH system.