SysScale: Exploiting Multi-domain Dynamic Voltage and Frequency Scaling\n for Energy Efficient Mobile Processors

There are three domains in a modern thermally-constrained mobile\nsystem-on-chip (SoC): compute, IO, and memory. We observe that a modern SoC\ntypically allocates a fixed power budget, corresponding to worst-case\nperformance demands, to the IO and memory domains even if they are\nunderutilized. The resulting unfair allocation of the power budget across\ndomains can cause two major issues: 1) the IO and memory domains can operate at\na higher frequency and voltage than necessary, increasing power consumption and\n2) the unused power budget of the IO and memory domains cannot be used to\nincrease the throughput of the compute domain, hampering performance. To avoid\nthese issues, it is crucial to dynamically orchestrate the distribution of the\nSoC power budget across the three domains based on their actual performance\ndemands.\n We propose SysScale, a new multi-domain power management technique to improve\nthe energy efficiency of mobile SoCs. SysScale is based on three key ideas.\nFirst, SysScale introduces an accurate algorithm to predict the performance\n(e.g., bandwidth and latency) demands of the three SoC domains. Second,\nSysScale uses a new DVFS (dynamic voltage and frequency scaling) mechanism to\ndistribute the SoC power to each domain according to the predicted performance\ndemands. Third, in addition to using a global DVFS mechanism, SysScale uses\ndomain-specialized techniques to optimize the energy efficiency of each domain\nat different operating points.\n We implement SysScale on an Intel Skylake microprocessor for mobile devices\nand evaluate it using a wide variety of SPEC CPU2006, graphics (3DMark), and\nbattery life workloads (e.g., video playback). On a 2-core Skylake, SysScale\nimproves the performance of SPEC CPU2006 and 3DMark workloads by up to 16% and\n8.9% (9.2% and 7.9% on average), respectively.\n