Characterization of Bond Wire Interconnects in QFN Packages
Qun Xiao
Abstract
Qun Xiao
Abstract
This paper discusses models and measurements of bond wire interconnects in Quad-Flat No-lead (QFN) packages. A bond wire interconnect between a 3 mm, 14-lead QFN lead frame and a GaAs chip is used as an example to demonstrate the modelling and measurement process. Measurement results are compared with extracted models and electromagnetic (EM) simulations to verify model and simulation accuracy. Based on the extracted simplified model, theoretical bandwidth limitations of bond wire interconnects are discussed.
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This paper discusses models and measurements of bond wire interconnects in Quad-Flat No-lead (QFN) packages. A bond wire interconnect between a 3 mm, 14-lead QFN lead frame and a GaAs chip is used as an example to demonstrate the modelling and measurement process. Measurement results are compared with extracted models and electromagnetic (EM) simulations to verify model and simulation accuracy. Based on the extracted simplified model, theoretical bandwidth limitations of bond wire interconnects are discussed.
Key concepts: Quad Flat No-leads package, Lead frame, Wire bonding, Interconnection, Integrated circuit packaging, Chip-scale package, Electronic engineering, Materials science