2003•Unpublished venueRequires access
Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's
A. Keshavarzi, S. Narendra, S. Borkar, C. Hawkins, K. Royi, V. De
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Abstract
Article Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's Share on Authors: Ali Keshavarzi MicroComputer Research Labs, Intel Corporation, Hillsboro, OR MicroComputer Research Labs, Intel Corporation, Hillsboro, ORView Profile , Siva Narendra MicroComputer Research Labs, Intel Corporation, Hillsboro, OR MicroComputer Research Labs, Intel Corporation, Hillsboro, ORView Profile , Shekhar Borkar MicroComputer Research Labs, Intel Corporation, Hillsboro, OR MicroComputer Research Labs, Intel Corporation, Hillsboro, ORView Profile , Charles Hawkins The University of New Mexico, Intel Corporation, Hillsboro, OR The University of New Mexico, Intel Corporation, Hillsboro, ORView Profile , Kaushik Roy Purdue University, Intel Corporation, Hillsboro, OR Purdue University, Intel Corporation, Hillsboro, ORView Profile , Vivek De MicroComputer Research Labs, Intel Corporation, Hillsboro, OR MicroComputer Research Labs, Intel Corporation, Hillsboro, ORView Profile Authors Info & Affiliations ISLPED '99: Proceedings of the 1999 international symposium on Low power electronics and designAugust 1999 Pages 252–254https://doi.org/10.1145/313817.313937Published:17 August 1999 72citation704DownloadsMetricsTotal Citations72Total Downloads704Last 12 Months16Last 6 weeks2 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access