Merged transistor logic--A low-cost bipolar logic concept
H. Berger, S. Wiedman
Abstract
H. Berger, S. Wiedman
Abstract
A bipolar logic concept allowing high functional densities comparable with advanced FET logic due to omission of isolation diffusion and ohmic resistors (four mask steps only) will be described. Despite process simplicity a power-x delay product of 0.7 pJ has been experimentally verified.
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A bipolar logic concept allowing high functional densities comparable with advanced FET logic due to omission of isolation diffusion and ohmic resistors (four mask steps only) will be described. Despite process simplicity a power-x delay product of 0.7 pJ has been experimentally verified.
Key concepts: Resistor–transistor logic, Emitter-coupled logic, Pass transistor logic, Logic gate, Logic family, Bipolar junction transistor, Resistor, Diode–transistor logic