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Merged transistor logic--A low-cost bipolar logic concept

H. Berger, S. Wiedman

Open publisher page 13 citations

Abstract

A bipolar logic concept allowing high functional densities comparable with advanced FET logic due to omission of isolation diffusion and ohmic resistors (four mask steps only) will be described. Despite process simplicity a power-x delay product of 0.7 pJ has been experimentally verified.

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What this paper is about

A bipolar logic concept allowing high functional densities comparable with advanced FET logic due to omission of isolation diffusion and ohmic resistors (four mask steps only) will be described. Despite process simplicity a power-x delay product of 0.7 pJ has been experimentally verified.

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OpenAlex reports 13 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

A bipolar logic concept allowing high functional densities comparable with advanced FET logic due to omission of isolation diffusion and ohmic resistors (four mask steps only) will be described. Despite process simplicity a power-x delay product of 0.7 pJ has been experimentally verified.

Key concepts: Resistor–transistor logic, Emitter-coupled logic, Pass transistor logic, Logic gate, Logic family, Bipolar junction transistor, Resistor, Diode–transistor logic

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