FPGA Design Duplication based on the Bitstream Extraction
So‐Yeon Choi, Nari Im, Hoyoung Yoo
Abstract
So‐Yeon Choi, Nari Im, Hoyoung Yoo
Abstract
Due to fast design process, SRAM-based Field Programmable Gate Array (FPGA) is widely used for various industrial applications. Since the netlist stored in external nonvolatile memory is transferred in the form of bitstream whenever FPGA powers on, the netlist on FPGA is vulnerable for malicious attacks. In this paper, we present how the attackers duplicate the original FPGA design using FPGA bitstream extraction, and emphasize the need for countermeasure to prevent such malicious duplication. Xilinx Spartan-6 evaluation board is used, which includes XC6SLX9 FPGA and XCF04S flash memory. According to the experiments, the described method is succeeded in replicating the original design on the other FPGA.
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Due to fast design process, SRAM-based Field Programmable Gate Array (FPGA) is widely used for various industrial applications. Since the netlist stored in external nonvolatile memory is transferred in the form of bitstream whenever FPGA powers on, the netlist on FPGA is vulnerable for malicious attacks. In this paper, we present how the attackers duplicate the original FPGA design using FPGA bitstream extraction, and emphasize the need for countermeasure to prevent such malicious duplication. Xilinx Spartan-6 evaluation board is used, which includes XC6SLX9 FPGA and XCF04S flash memory. According to the experiments, the described method is succeeded in replicating the original design on the other FPGA.
Key concepts: Netlist, Field-programmable gate array, Bitstream, Computer science, Embedded system, Computer hardware, Static random-access memory, Decoding methods