EFFECT OF VECTORIZATION AND BRANCHING ON PROCESSING SPEED OF VLIW PROCESSOR

Since the microprocessor was invented in 1970’s from that time the major work researchers are doing is to improve the performance of the microprocessor. Especially for high performance computing (HPC) applications like video conferencing, speech processing, weather forecasting and military applications where huge amount of data is needed to process very fast. Simply says “two heads are better than one” means two powerful concepts will forms a better concept that will be application specific but not general purpose and very powerful at its place, So we are implementing a processor having both instruction level parallelisms (ILP) by VLIW design and data level parallelism (DLP) by vector design is a good idea for such applications. First objective of this research is to measure and compare the performance of a statically multi issue processor can be called as an “array based VLIW processor” with respect to simple VLIW processor. Secondly we show the effect of branching on the processor clock cycles for both with and without branching using TRIMARAN framework 4.0(a compiler and simulator infrastructure for research in embedded system) on ILP+DLP approach.