Application of Voter Insertion Algorithm for Fault Management using Triple Modular Redundancy (TMR) Technique
M. Santhiya, S. Saranya, S. Vijayachitra, C. B. Lavanya, M. Rajarajeswari
Abstract
M. Santhiya, S. Saranya, S. Vijayachitra, C. B. Lavanya, M. Rajarajeswari
Abstract
In recent days, the reliability and the accuracy of the system plays an important role in every industry starting from medical, mechanical, electrical, to everything. It is hard to achieve hundred percent accuracy and also to reduce all the possible errors happening. A technique called redundancy is used to increase the reliability in fields which uses combinational logic circuits for its working operation. The triple modular redundancy mechanism is famous for fault reduction and is also referred to as the fault tolerance mechanism. The construction of proper voter algorithm plays a vital role in TMR implementation. In fault-tolerant computing area, the most priority is given to the hardware fault tolerance systems. In this article, the model of triple modular redundancy is discussed and the improvements for voter circuit algorithms are proposed. The various aspects of Triple Modular Redundancy technique such as reliability improvement, usage in critical operations and field improvement are also analyzed in this paper. In addition to this, the comparison of TMR with various redundancy techniques such as Hamming code (SEC - DED), Standby sparing, NMR with spares, etc. is presented for the proper selection of redundancy mechanism for the particular application depending upon the user requirement.
OpenAlex reports 17 citations for this work. Citation counts describe recorded attention and do not establish research quality.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
In recent days, the reliability and the accuracy of the system plays an important role in every industry starting from medical, mechanical, electrical, to everything. It is hard to achieve hundred percent accuracy and also to reduce all the possible errors happening. A technique called redundancy is used to increase the reliability in fields which uses combinational logic circuits for its working operation. The triple modular redundancy mechanism is famous for fault reduction and is also referred to as the fault tolerance mechanism. The construction of proper voter algorithm plays a vital role in TMR implementation. In fault-tolerant computing area, the most priority is given to the hardware fault tolerance systems. In this article, the model of triple modular redundancy is discussed and the improvements for voter circuit algorithms are proposed. The various aspects of Triple Modular Redundancy technique such as reliability improvement, usage in critical operations and field improvement are also analyzed in this paper. In addition to this, the comparison of TMR with various redundancy techniques such as Hamming code (SEC - DED), Standby sparing, NMR with spares, etc. is presented for the proper selection of redundancy mechanism for the particular application depending upon the user requirement.
Key concepts: Triple modular redundancy, Redundancy (engineering), Fault tolerance, Computer science, Modular design, Hamming distance, Reliability engineering, Embedded system