Signal Integrity Simulation Design and Analysis of Electronic Article Surveillance PCB for RFID applications

The modern electronics industry is working for miniaturization of electronic devices will ultimately call for the dense design of PCB, shrinking geometry of ICs and high speed interference. Mostly communication devices operate on low power and high frequency. As shrinking of the silicon wafer area significantly increases the interconnection problems. Crosstalk, impedance mismatch, reflection, skew, and propagation delay are major issues that are caused by interconnection and limit the performance of the high-speed design. This paper presents Signal Integrity (SI) simulation design analysis by using Cadence Allegro SPB Software. For this purpose, Input/Output Buffer Information Specification (IBIS) models are assigned to simulate reflection and crosstalk. Signal integrity analysis is performed and improvement in simulation design is presented which enhances the design intuitively and validates high speed PCB analysis.