2020Unpublished venueRequires access

Digital Design Through Verilog HDL

Manoj Kumar Majumder, Vijay Rao Kumbhare, Aditya Japa, Brajesh Kumar Kaushik

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Abstract

This chapter presents the basics and elements of Verilog Hardware Description Language (HDL). Later, the three different styles such as behavioral-level, gate-level, and dataflow level modeling styles are clearly explained. The syntax of each modeling style and its related aspects are explained in detail. Finally, the chapter covers the tasks and functions and ends with the summary and a brief conclusion.

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What this paper is about

This chapter presents the basics and elements of Verilog Hardware Description Language (HDL). Later, the three different styles such as behavioral-level, gate-level, and dataflow level modeling styles are clearly explained. The syntax of each modeling style and its related aspects are explained in detail. Finally, the chapter covers the tasks and functions and ends with the summary and a brief conclusion.

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Available abstract

This chapter presents the basics and elements of Verilog Hardware Description Language (HDL). Later, the three different styles such as behavioral-level, gate-level, and dataflow level modeling styles are clearly explained. The syntax of each modeling style and its related aspects are explained in detail. Finally, the chapter covers the tasks and functions and ends with the summary and a brief conclusion.

Key concepts: Verilog, Computer science, Embedded system, Field-programmable gate array

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