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2013•International Journal of Communication Networks and SecurityOpen access

DESIGN SPACE EXPLORATION AND OPTIMIZATION OF SUPER SCALAR PROCESSOR

K. Navatha, PROF.G. KRISHNA MURTHY

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Abstract

Designing a microprocessor involves determining the optimal microarchitecture for a given objective function and a given set of constraints. Superscalar processing is the latest in along series of innovations aimed at producing ever-faster microprocessors. By exploiting instruction-level parallelism, superscalar processors[1] are capable of executing more than one instruction in a clock cycle.The architectural design of super scalar processor involves a lot of trade off issues when selecting parameter values for instruction level parallelism.The use of critical quantitative analysis based upon the Simple Scalar simulations is necessary to select optimal parameter values for the processor aimed at specific target environment. This paper aims at finding optimal values for the super scalar processor and determines which processor parameters have the greatest impact on the simulated execution time.

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Designing a microprocessor involves determining the optimal microarchitecture for a given objective function and a given set of constraints. Superscalar processing is the latest in along series of innovations aimed at producing ever-faster microprocessors. By exploiting instruction-level parallelism, superscalar processors[1] are capable of executing more than one instruction in a clock cycle.The architectural design of super scalar processor involves a lot of trade off issues when selecting parameter values for instruction level parallelism.The use of critical quantitative analysis based upon the Simple Scalar simulations is necessary to select optimal parameter values for the processor aimed at specific target environment. This paper aims at finding optimal values for the super scalar processor and determines which processor parameters have the greatest impact on the simulated execution time.

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Available abstract

Designing a microprocessor involves determining the optimal microarchitecture for a given objective function and a given set of constraints. Superscalar processing is the latest in along series of innovations aimed at producing ever-faster microprocessors. By exploiting instruction-level parallelism, superscalar processors[1] are capable of executing more than one instruction in a clock cycle.The architectural design of super scalar processor involves a lot of trade off issues when selecting parameter values for instruction level parallelism.The use of critical quantitative analysis based upon the Simple Scalar simulations is necessary to select optimal parameter values for the processor aimed at specific target environment. This paper aims at finding optimal values for the super scalar processor and determines which processor parameters have the greatest impact on the simulated execution time.

Key concepts: Microarchitecture, Computer science, Instructions per cycle, Superscalar, Microprocessor, Parallel computing, Instruction-level parallelism, Design space exploration

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