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2020•Unpublished venueRequires access

Chip/Package/Board Co-Design Methodology Applied to Full-Custom Heterogeneous Integration

Thomas Brandtner, Klaus Pressel, Natalia Floman, Michael Schultz, M. Vogl

Open publisher page 8 citations

Abstract

Heterogeneous integration leads to significant increase in design complexity. We present a modular full-custom chip/package/board co-design environment based on a versatile backbone idea, which has been used successfully in various system-in-package (SiP) designs. We show challenges and solutions for co-design applied to traditional leadframe assembly and packaging (e.g. QFP, QFN, TO, SON, DSO) as well as more recent technologies like FOWLP or laminate BGA and LGA.

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What this paper is about

Heterogeneous integration leads to significant increase in design complexity. We present a modular full-custom chip/package/board co-design environment based on a versatile backbone idea, which has been used successfully in various system-in-package (SiP) designs. We show challenges and solutions for co-design applied to traditional leadframe assembly and packaging (e.g. QFP, QFN, TO, SON, DSO) as well as more recent technologies like FOWLP or laminate BGA and LGA.

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OpenAlex reports 8 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

Heterogeneous integration leads to significant increase in design complexity. We present a modular full-custom chip/package/board co-design environment based on a versatile backbone idea, which has been used successfully in various system-in-package (SiP) designs. We show challenges and solutions for co-design applied to traditional leadframe assembly and packaging (e.g. QFP, QFN, TO, SON, DSO) as well as more recent technologies like FOWLP or laminate BGA and LGA.

Key concepts: Quad Flat No-leads package, Ball grid array, Chip-scale package, Package on package, System in package, Modular design, Package design, Chip

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