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2020•Unpublished venueRequires access

Improving Input Circuits for 7-bit Flash AD Converter

Miroslav Sokol, Pavol Galajda, Martin Pečovský

Open publisher page 3 citations

Abstract

The development of the flash analog-digital converter (ADC) includes mainly the design of the input comparators. This paper deals with the design and improvement of the high-speed comparator for a 7-bit Flash ADC for Ultra-Wideband (UWB) sensor systems. The comparator is designed in 0.35 μm SiGe BiCMOS technology by AMS. Proposed comparator achieves 480 MHz bandwidth with 1 mV input resolution at signal range 1.6 Vpp. The power consumption of the designed comparator cell is 5.9 mW at -3.3 V power supply. The improved comparator was compared with the previous one designed for 4-bit flash ADC. For comparison, the basic parameters of the post-layout simulations were performed.

About this research paper

What this paper is about

The development of the flash analog-digital converter (ADC) includes mainly the design of the input comparators. This paper deals with the design and improvement of the high-speed comparator for a 7-bit Flash ADC for Ultra-Wideband (UWB) sensor systems. The comparator is designed in 0.35 μm SiGe BiCMOS technology by AMS. Proposed comparator achieves 480 MHz bandwidth with 1 mV input resolution at signal range 1.6 Vpp. The power consumption of the designed comparator cell is 5.9 mW at -3.3 V power supply. The improved comparator was compared with the previous one designed for 4-bit flash ADC. For comparison, the basic parameters of the post-layout simulations were performed.

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Available abstract

The development of the flash analog-digital converter (ADC) includes mainly the design of the input comparators. This paper deals with the design and improvement of the high-speed comparator for a 7-bit Flash ADC for Ultra-Wideband (UWB) sensor systems. The comparator is designed in 0.35 μm SiGe BiCMOS technology by AMS. Proposed comparator achieves 480 MHz bandwidth with 1 mV input resolution at signal range 1.6 Vpp. The power consumption of the designed comparator cell is 5.9 mW at -3.3 V power supply. The improved comparator was compared with the previous one designed for 4-bit flash ADC. For comparison, the basic parameters of the post-layout simulations were performed.

Key concepts: Comparator, Flash ADC, Flash (photography), Computer science, 4-bit, Analog-to-digital converter, Electronic engineering, Comparator applications

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