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2020•2020 Moscow Workshop on Electronic and Networking Technologies (MWENT)Requires access

Floating Complementary JFET Differential Stage with Increased Rejection of input Common Mode Signal and Power-Supply Noises

Nikolay N. Prokopenko, Alexey A. Zhuk, I. V. Pakhomov

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Abstract

The circuit solutions that provide increase of common-mode rejection ratio (CMRR) and power-supply noises rejection ratio (PSRR) on a basic parameters of input "floating" complementary differential stage (FCDS) are proposed in the article. This subclass of differential stages is different by low noise level, high radiation hardness and ability of work at low temperatures through the use of junction field- effect transistors. The modified FCDS circuit simulating with CJFET transistors models, consider influence of cryogenic temperatures in LTspice simulation software results are showed. They show that CMRR and PSRR are improved by 2-3 orders of magnitude.

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What this paper is about

The circuit solutions that provide increase of common-mode rejection ratio (CMRR) and power-supply noises rejection ratio (PSRR) on a basic parameters of input "floating" complementary differential stage (FCDS) are proposed in the article. This subclass of differential stages is different by low noise level, high radiation hardness and ability of work at low temperatures through the use of junction field- effect transistors. The modified FCDS circuit simulating with CJFET transistors models, consider influence of cryogenic temperatures in LTspice simulation software results are showed. They show that CMRR and PSRR are improved by 2-3 orders of magnitude.

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Available abstract

The circuit solutions that provide increase of common-mode rejection ratio (CMRR) and power-supply noises rejection ratio (PSRR) on a basic parameters of input "floating" complementary differential stage (FCDS) are proposed in the article. This subclass of differential stages is different by low noise level, high radiation hardness and ability of work at low temperatures through the use of junction field- effect transistors. The modified FCDS circuit simulating with CJFET transistors models, consider influence of cryogenic temperatures in LTspice simulation software results are showed. They show that CMRR and PSRR are improved by 2-3 orders of magnitude.

Key concepts: Common-mode rejection ratio, Power supply rejection ratio, Common-mode signal, JFET, Transistor, Electronic engineering, Differential (mechanical device), Computer science

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