VLSI design of Parity check Code with Hamming Code for Error Detection and Correction

In order to get error-free data in any wireless communication systems the data has to be transmitted and received in an efficient manner. But in case of some wireless networks such as cognitive radio(CR) technology ,while performing spectrum sensing and spectrum allocation, they may cause interferences which leads to creating error in transmitted data. To overcome such problem in CR technology, the efficient data transmission needs Error Detection and Correction method. Here various error detection and correction methods are implemented based on parity check code along with hamming code algorithm. Encoder block may calculate the parity bits for data bits in various parity check code methods and also parity bits are coded with hamming codes. Whereas in decoder block, data can be regenerated after calculating syndrome vector and parity checking also takes place. Such encoder and decoder block is developed using verilog coding in Xilinx ISE software. Finally the comparison of various parity check code with hamming code is distinguished.