2019Unpublished venueRequires access

A Cryogenic CMOS Low Dropout Voltage Regulator Design for Space Applications

Halil İbrahim Kayıhan, Aykut Kabaoğlu, Mustafa Berke Yelten

Open publisher page 6 citations

Abstract

In this study, a low drop-out (LDO) voltage regulator which can operate at cryogenic temperatures is designed using cryogenic transistor models of 0.18μm UMC CMOS process. The designed LDO regulator can provide a 100mA load current while generating four different digitally configurable output voltage levels (0.9V, 1.2V, 1.5V, 1.8V). The designed LDO has 92mV, 80mV, 66mV and 77mV drop-out voltages for the output voltage levels 0.9V, 1.2V, 1.5V, and 1.8 V, respectively. Output voltage level varies by ~10mV from 77K to room temperature of 300K. The post-layout simulation results of the overall LDO are presented.

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What this paper is about

In this study, a low drop-out (LDO) voltage regulator which can operate at cryogenic temperatures is designed using cryogenic transistor models of 0.18μm UMC CMOS process. The designed LDO regulator can provide a 100mA load current while generating four different digitally configurable output voltage levels (0.9V, 1.2V, 1.5V, 1.8V). The designed LDO has 92mV, 80mV, 66mV and 77mV drop-out voltages for the output voltage levels 0.9V, 1.2V, 1.5V, and 1.8 V, respectively. Output voltage level varies by ~10mV from 77K to room temperature of 300K. The post-layout simulation results of the overall LDO are presented.

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Available abstract

In this study, a low drop-out (LDO) voltage regulator which can operate at cryogenic temperatures is designed using cryogenic transistor models of 0.18μm UMC CMOS process. The designed LDO regulator can provide a 100mA load current while generating four different digitally configurable output voltage levels (0.9V, 1.2V, 1.5V, 1.8V). The designed LDO has 92mV, 80mV, 66mV and 77mV drop-out voltages for the output voltage levels 0.9V, 1.2V, 1.5V, and 1.8 V, respectively. Output voltage level varies by ~10mV from 77K to room temperature of 300K. The post-layout simulation results of the overall LDO are presented.

Key concepts: Dropout voltage, Low-dropout regulator, Voltage regulator, Regulator, CMOS, Voltage, Transistor, Electrical engineering

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