Development and Optimization Design of Digital Logic device based on FPGA
Heng Wang, Xinrui Chen
Abstract
Open-access reader
Heng Wang, Xinrui Chen
Abstract
Open-access reader
Abstract FPGA is the abbreviation of Field Programmable Gate Array. The corresponding CPLD is the abbreviation of complex Programmable Logic device. So sometimes the difference can be ignored, collectively called programmable logic devices or CPLD/PGFA. FPGA has a universal structure of masked programmable gate arrays, which is arranged by logical function blocks and connected by programmable interconnection resources to implement different designs. The basic function of a digital electronic clock based on FPGA is designed, simulated and realized by using digital electronic technology, such as FPGA and so on.
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Abstract FPGA is the abbreviation of Field Programmable Gate Array. The corresponding CPLD is the abbreviation of complex Programmable Logic device. So sometimes the difference can be ignored, collectively called programmable logic devices or CPLD/PGFA. FPGA has a universal structure of masked programmable gate arrays, which is arranged by logical function blocks and connected by programmable interconnection resources to implement different designs. The basic function of a digital electronic clock based on FPGA is designed, simulated and realized by using digital electronic technology, such as FPGA and so on.
Key concepts: Complex programmable logic device, Field-programmable gate array, Programmable Array Logic, Programmable logic device, Erasable programmable logic device, Simple programmable logic device, Macrocell array, Programmable logic array