500 GHz CMOS heterodyne imager adopting fourth subharmonic passive mixer

Abstract A 500 GHz heterodyne imager adopting a source‐driven fourth subharmonic single balanced resistive mixer is implemented in 65‐nm CMOS technology. The adopted passive mixer improves the port‐to‐port isolation and minimizes the input matching loss. At an LO power of 5 dBm, the imager achieves a conversion loss and double sideband noise figure of 30.2 dB and 51 dB, respectively, which corresponds to −93 dBm and 15.8 fW/Hz0.5 of sensitivity and the effective noise equivalent power, respectively, assuming a noise bandwidth of 1 kHz. To the best of authors' knowledge, the proposed work is the highest frequency implementation as a CMOS‐based heterodyne imagers adopting resistive mixers.