Flight Safety Certification Implications for Complex Multi-Core Processor based Avionics Systems

Since the early 1990s, federated avionics architecture - where one computing resource executes only one application, is being replaced by Integrated Modular Avionics (IMA) architectures. IMA architectures employ a partitioned environment that hosts multiple avionics functions of different safety criticalities on a common computing platform. This provides for size, weight, and power savings via denser functional integration. Several cores integrated onto one device allows more functions to be integrated together on one processor and in one piece of equipment. The use of multicore processors in safety-critical avionics applications will provide growth for further integration for the future generations of these systems. Hence aerospace equipment suppliers are interested in using Multi-Core Processors (MCPs) in their systems. With the rapid increase in demand for computational performance and cost optimum, Single-Core Processors (SCPs) are likely to become obsolete. However, with the shift to multi-core processors, compliance to safety requirements is becoming critical. The development and use of increasingly complex electronic hardware by the aviation industry for more of the safety-critical aircraft functions is creating new safety and certification concerns.