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2019•Unpublished venueRequires access

Linearity optimization of current steering DAC based on improved layout topology

Xingyuan Tong, Chaofeng Wang, Fengjuan Wang

Open publisher page 2 citations

Abstract

The influence of current mismatch on linearity of current steering DAC is theoretically discussed. $Q^{2}$ random walk scheme that can reduce the secondary error of current mismatch is utilized for optimizing the linearity of DAC. A 10 bit DAC is realized in $0.18 \mu \mathrm{m}$ CMOS. Measurement results show that the differential non-linearity (DNL) and the integral non-linearity (INL) of the DAC are 0.71 LSB and 1.02 LSB. With 500 MS/s sampling rate and 1.465 MHz input frequency, the spurious free dynamic range (SFDR) and the effective number of bits (ENOB) are 65.6 dB and 9.2 bit, respectively.

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What this paper is about

The influence of current mismatch on linearity of current steering DAC is theoretically discussed. $Q^{2}$ random walk scheme that can reduce the secondary error of current mismatch is utilized for optimizing the linearity of DAC. A 10 bit DAC is realized in $0.18 \mu \mathrm{m}$ CMOS. Measurement results show that the differential non-linearity (DNL) and the integral non-linearity (INL) of the DAC are 0.71 LSB and 1.02 LSB. With 500 MS/s sampling rate and 1.465 MHz input frequency, the spurious free dynamic range (SFDR) and the effective number of bits (ENOB) are 65.6 dB and 9.2 bit, respectively.

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Available abstract

The influence of current mismatch on linearity of current steering DAC is theoretically discussed. $Q^{2}$ random walk scheme that can reduce the secondary error of current mismatch is utilized for optimizing the linearity of DAC. A 10 bit DAC is realized in $0.18 \mu \mathrm{m}$ CMOS. Measurement results show that the differential non-linearity (DNL) and the integral non-linearity (INL) of the DAC are 0.71 LSB and 1.02 LSB. With 500 MS/s sampling rate and 1.465 MHz input frequency, the spurious free dynamic range (SFDR) and the effective number of bits (ENOB) are 65.6 dB and 9.2 bit, respectively.

Key concepts: Linearity, Topology (electrical circuits), Current (fluid), Computer science, Topology optimization, Electronic engineering, Electrical engineering, Engineering

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