Implementation of a High PSRR Low Power CMOS Bandgap Voltage Reference Circuit

This paper uses a current control loop low dropout linear regulator (CCL-LDO) to provide the operating supply voltage of a bandgap voltage reference (BGR) circuit to form a high PSRR low power BGR circuit. This proposed high PSRR low power CMOS BGR circuit is design and implemented using the TSMC 0.35 μm 2P4M process technology. Based on simulated and measured results, the chip size is 850 × 804 μ2with power dissipation about 1.244 mW The designed BGR circuit can operate from 2.9 V to 3.3 V and generates a stable reference output voltage 0.8 V. The BGR circuit can operate temperature from 0°C to 100°C, and its output reference voltage is stable with a variation of about 150 uV. The temperature coefficient is about 5 ppm/°C~ 10 ppm/°C. Finally, the BGR circuit provides -101 dB power supply rejection ratio (PSRR) at low frequency (100 Hz) region and the PSRR at 1 MHz is also below -47 dB.