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2019•arXiv (Cornell University)Open access

Charge pump phase-locked loop with phase-frequency detector: closed form mathematical model

Nikolay V. Kuznetsov, M. V. Yuldashev, R. V. Yuldashev, M.V. Blagov, Elena V. Kudryashova, Olga Aleksandrovna Kuznetsova, Timur Nazirovich Mokaev

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Abstract

Charge pump phase-locked loop with phase-frequency detector (CP-PLL) is an electrical circuit, widely used in digital systems for frequency synthesis and synchronization of the clock signals. In this paper a non-linear second-order model of CP-PLL is rigorously derived. The obtained model obviates the shortcomings of previously known second-order models of CP-PLL. Pull-in time is estimated for the obtained second-order CP-PLL.

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Charge pump phase-locked loop with phase-frequency detector (CP-PLL) is an electrical circuit, widely used in digital systems for frequency synthesis and synchronization of the clock signals. In this paper a non-linear second-order model of CP-PLL is rigorously derived. The obtained model obviates the shortcomings of previously known second-order models of CP-PLL. Pull-in time is estimated for the obtained second-order CP-PLL.

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Available abstract

Charge pump phase-locked loop with phase-frequency detector (CP-PLL) is an electrical circuit, widely used in digital systems for frequency synthesis and synchronization of the clock signals. In this paper a non-linear second-order model of CP-PLL is rigorously derived. The obtained model obviates the shortcomings of previously known second-order models of CP-PLL. Pull-in time is estimated for the obtained second-order CP-PLL.

Key concepts: Phase-locked loop, Charge pump, Phase detector, PLL multibit, Detector, Phase (matter), Phase frequency detector, Synchronization (alternating current)

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