Design of high-speed multiplier by using carry select adder

An adder is a digital circuit that performs addition of numbers. In many computers and other kinds of processors in the arithmetic logic units, adders are used. In other parts of the processor, they are also utilized. Where they are used to calculate addresses, table indices, increment and decrement operators, and similar operations. Although adders can be constructed for many number representations, such as BINARY-DECODED DECIMAL or EXCESS-3, the most common adders operate on binary numbers. We designed an adder which is of high speed and applied this to a new multiplier for better performance multiplier by using CARRY SELECT ADDER in this project. In arithmetic operations, addition and multiplication are having a major role. When the number of bit increases, the complexity of the adder circuits increases and the speed performance decreases. The delay will be very much reduced proposed carry select adder based multiplier on comparing with carrying look ahead adder based multiplier, and the carry save adder based multiplier. The code is written in VHDL and Verilog and synthesized the design in Xilinx ISE 14.1.