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2018•International Journal of Integrated EngineeringOpen access

A 2x2 Bit Multiplier Using Hybrid 13T Full Adder with Vedic Mathematics Method

Lee Shing Jie

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Abstract

The 2x2 multiplier circuit was designed by using four AND gates and two 13T hybrid full adders as shown in Figure 1.Four input voltages of 1V are used for input A1, A0, B1 and B0.The two 13T HFAs are drove by the output produced by AND gate.13T HFA is chosen instead of half adder due to the specialty of 13T design.

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The 2x2 multiplier circuit was designed by using four AND gates and two 13T hybrid full adders as shown in Figure 1.Four input voltages of 1V are used for input A1, A0, B1 and B0.The two 13T HFAs are drove by the output produced by AND gate.13T HFA is chosen instead of half adder due to the specialty of 13T design.

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Available abstract

The 2x2 multiplier circuit was designed by using four AND gates and two 13T hybrid full adders as shown in Figure 1.Four input voltages of 1V are used for input A1, A0, B1 and B0.The two 13T HFAs are drove by the output produced by AND gate.13T HFA is chosen instead of half adder due to the specialty of 13T design.

Key concepts: Adder, Multiplier (economics), Arithmetic, Bit (key), Serial binary adder, Mathematics, Computer science, Materials science

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