Efficient FPGA Implementations of PRINTCIPHER
Tadashi Okabe
Abstract
Tadashi Okabe
Abstract
This article presents field programmable gate array (FPGA) implementations of PRINTCIPHER, which is an encryption algorithm for protecting important data in restricted computing environments such as lightweight devices and Radio Frequency Identifier (RFID) cards. PRINTCIPHER has been designed to ensure integrity and authentication with minimum resources. This article is the first work about FPGA implementations of PRINTCIPHER and proposes firstly efficient hardware architectures for PRINTCIPHER. Hardware implementation results for these architectures have been evaluated in this article. The proposed architectures are synthesizable and implemented on Spartan-3, Spartan-6 and Artix-7 Xilinx FPGAs.
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This article presents field programmable gate array (FPGA) implementations of PRINTCIPHER, which is an encryption algorithm for protecting important data in restricted computing environments such as lightweight devices and Radio Frequency Identifier (RFID) cards. PRINTCIPHER has been designed to ensure integrity and authentication with minimum resources. This article is the first work about FPGA implementations of PRINTCIPHER and proposes firstly efficient hardware architectures for PRINTCIPHER. Hardware implementation results for these architectures have been evaluated in this article. The proposed architectures are synthesizable and implemented on Spartan-3, Spartan-6 and Artix-7 Xilinx FPGAs.
Key concepts: Field-programmable gate array, Spartan, Computer science, Implementation, Embedded system, Encryption, Identifier, Authentication (law)