2018•EnergiesOpen access

A Design of Ambient RF Energy Harvester with Sensitivity of −21 dBm and Power Efficiency of a 39.3% Using Internal Threshold Voltage Compensation

Danial Khan, Hamed Abbasizadeh, Sang-Yun Kim, Zaffar Hayat Nawaz Khan, Syed Adil Ali Shah, YoungGun Pu, Keum Cheol Hwang, Youngoo Yang, Minjae Lee, Kang‐Yoon Lee

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Abstract

In this paper, a low-power reconfigurable ambient Radio Frequency to Direct Current power (RF–DC) converter using an internal threshold voltage cancellation (IVC) scheme with an auxiliary transistors block is presented. A maximum power point tracking (MPPT) algorithm is implemented in order to maintain the high efficiency by automatically selecting the number of stages. The proposed reconfigurable converter efficiently converts the RF signals to DC voltage by dynamically controlling the threshold voltage of the forward and reversed-biased transistors in the primary rectification body. During positive half-cycle, the proposed RF–DC converter reduces the voltage drop across the forward-biased transistors, which results in increased harvested power and output DC voltage. During negative half cycle, the proposed rectifier minimizes the reverse leakage current and prevents the loss of energy stored in the prior stages. A five-stage internal threshold compensated power converter is designed in 0.18 µm Complementary Metal-Oxide-Semiconductor (CMOS) technology with an active die area of 360 µm × 160 µm, while the Maximum Power Point Tracking (MPPT) occupies an active die area of 730 µm × 280 µm. The proposed scheme obtains maximum post-simulated power conversion efficiency (PCE) of 39.3% when input power level is −15 dBm and produces an output voltage of 3.3 V for a load of 1 MΩ and at a frequency of 900 MHz. The proposed scheme achieves a voltage sensitivity of 1V at a remarkably low input power of −21 dBm for a 1 MΩ load.

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In this paper, a low-power reconfigurable ambient Radio Frequency to Direct Current power (RF–DC) converter using an internal threshold voltage cancellation (IVC) scheme with an auxiliary transistors block is presented. A maximum power point tracking (MPPT) algorithm is implemented in order to maintain the high efficiency by automatically selecting the number of stages. The proposed reconfigurable converter efficiently converts the RF signals to DC voltage by dynamically controlling the threshold voltage of the forward and reversed-biased transistors in the primary rectification body. During positive half-cycle, the proposed RF–DC converter reduces the voltage drop across the forward-biased transistors, which results in increased harvested power and output DC voltage. During negative half cycle, the proposed rectifier minimizes the reverse leakage current and prevents the loss of energy stored in the prior stages. A five-stage internal threshold compensated power converter is designed in 0.18 µm Complementary Metal-Oxide-Semiconductor (CMOS) technology with an active die area of 360 µm × 160 µm, while the Maximum Power Point Tracking (MPPT) occupies an active die area of 730 µm × 280 µm. The proposed scheme obtains maximum post-simulated power conversion efficiency (PCE) of 39.3% when input power level is −15 dBm and produces an output voltage of 3.3 V for a load of 1 MΩ and at a frequency of 900 MHz. The proposed scheme achieves a voltage sensitivity of 1V at a remarkably low input power of −21 dBm for a 1 MΩ load.

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Available abstract

In this paper, a low-power reconfigurable ambient Radio Frequency to Direct Current power (RF–DC) converter using an internal threshold voltage cancellation (IVC) scheme with an auxiliary transistors block is presented. A maximum power point tracking (MPPT) algorithm is implemented in order to maintain the high efficiency by automatically selecting the number of stages. The proposed reconfigurable converter efficiently converts the RF signals to DC voltage by dynamically controlling the threshold voltage of the forward and reversed-biased transistors in the primary rectification body. During positive half-cycle, the proposed RF–DC converter reduces the voltage drop across the forward-biased transistors, which results in increased harvested power and output DC voltage. During negative half cycle, the proposed rectifier minimizes the reverse leakage current and prevents the loss of energy stored in the prior stages. A five-stage internal threshold compensated power converter is designed in 0.18 µm Complementary Metal-Oxide-Semiconductor (CMOS) technology with an active die area of 360 µm × 160 µm, while the Maximum Power Point Tracking (MPPT) occupies an active die area of 730 µm × 280 µm. The proposed scheme obtains maximum post-simulated power conversion efficiency (PCE) of 39.3% when input power level is −15 dBm and produces an output voltage of 3.3 V for a load of 1 MΩ and at a frequency of 900 MHz. The proposed scheme achieves a voltage sensitivity of 1V at a remarkably low input power of −21 dBm for a 1 MΩ load.

Key concepts: dBm, Sensitivity (control systems), Compensation (psychology), Power (physics), Electrical engineering, Voltage, Energy (signal processing), Materials science

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