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2017•Unpublished venueRequires access

Logic Design of a 4-Bit Bit-Slice Matrix Multiplier for 32-Bit RSFQ Artificial Intelligence Processors

Guang-Ming Tang

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Abstract

A 4-bit bit-slice matrix multiplier for 32-bit rapid single-flux-quantum (RSFQ) artificial intelligence processors is proposed. The multiplier mainly consists of 4-bit bit-slice multipliers and 4-bit bit-slice adders. The multiplication of unsigned integer matrixes is implemented by control signals. The result shows our method simplifies the circuit complexity, reduces the hardware costs and allows extending the matrix multiplier to a smaller or larger number of bits.

About this research paper

What this paper is about

A 4-bit bit-slice matrix multiplier for 32-bit rapid single-flux-quantum (RSFQ) artificial intelligence processors is proposed. The multiplier mainly consists of 4-bit bit-slice multipliers and 4-bit bit-slice adders. The multiplication of unsigned integer matrixes is implemented by control signals. The result shows our method simplifies the circuit complexity, reduces the hardware costs and allows extending the matrix multiplier to a smaller or larger number of bits.

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Available abstract

A 4-bit bit-slice matrix multiplier for 32-bit rapid single-flux-quantum (RSFQ) artificial intelligence processors is proposed. The multiplier mainly consists of 4-bit bit-slice multipliers and 4-bit bit-slice adders. The multiplication of unsigned integer matrixes is implemented by control signals. The result shows our method simplifies the circuit complexity, reduces the hardware costs and allows extending the matrix multiplier to a smaller or larger number of bits.

Key concepts: Multiplier (economics), Rapid single flux quantum, Adder, Arithmetic, Bit (key), Computer science, 4-bit, 8-bit

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Logic Design of a 4-Bit Bit-Slice Matrix Multiplier for 32-Bit RSFQ Artificial Intelligence Processors — Research Paper | ScholarLens