ESTIMATION OF DESIGN CHARACTERISTICS AT RTL MODELING LEVEL USING SYSTEMC
Robertas Damaševičius
Abstract
Open-access reader
Robertas Damaševičius
Abstract
Open-access reader
A successful SoC and embedded system design requires the thorough domain analysis and design space exploration. The early evaluation of design characteristics allows to take advantage of many architectural options available and to modify the system architecture, if needed. Currently, SystemC is used to model hardware and software parts of the system at the high-level. However, the characteristics of the modeled systems are obtained only at the late stages of the design. In this paper, we present a framework for the estimation of design characteristics at the modeling level of a design. The SystemC class library is extended with new classes describing the computation of area, delay and power characteristics of the SystemC models. The achieved results are illustrated with a case study.
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A successful SoC and embedded system design requires the thorough domain analysis and design space exploration. The early evaluation of design characteristics allows to take advantage of many architectural options available and to modify the system architecture, if needed. Currently, SystemC is used to model hardware and software parts of the system at the high-level. However, the characteristics of the modeled systems are obtained only at the late stages of the design. In this paper, we present a framework for the estimation of design characteristics at the modeling level of a design. The SystemC class library is extended with new classes describing the computation of area, delay and power characteristics of the SystemC models. The achieved results are illustrated with a case study.
Key concepts: SystemC, Computer science, Design space exploration, Electronic system-level design and verification, Computer architecture, High-level synthesis, Transaction-level modeling, Embedded system