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An efficient HMAC processor based on the SHA-3 HASH function

Junhui Li, Liji Wu, Xiangmin Zhang

Open publisher page 4 citations

Abstract

The Keyed-Hash Message Authentication Codes (HMAC) is a widely used method to ensure the integrity and authentication of data. In this paper an FPGA-based efficient processor of the Keyed-Hash Message Authentication Codes (HMAC) using the Secure Hash Algorithm3-224 (SHA3-224) is presented. Any length of message and key can be processed by this processer. To achieve the high throughput which can reach up to 2.3Gbps, some optimizations such as pre-process, key reusing and two SHA-3 cores cooperation are employed. As a result, this proposed HMAC processor is applicable for a wide range of performance-oriented security systems.

About this research paper

What this paper is about

The Keyed-Hash Message Authentication Codes (HMAC) is a widely used method to ensure the integrity and authentication of data. In this paper an FPGA-based efficient processor of the Keyed-Hash Message Authentication Codes (HMAC) using the Secure Hash Algorithm3-224 (SHA3-224) is presented. Any length of message and key can be processed by this processer. To achieve the high throughput which can reach up to 2.3Gbps, some optimizations such as pre-process, key reusing and two SHA-3 cores cooperation are employed. As a result, this proposed HMAC processor is applicable for a wide range of performance-oriented security systems.

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OpenAlex reports 4 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

The Keyed-Hash Message Authentication Codes (HMAC) is a widely used method to ensure the integrity and authentication of data. In this paper an FPGA-based efficient processor of the Keyed-Hash Message Authentication Codes (HMAC) using the Secure Hash Algorithm3-224 (SHA3-224) is presented. Any length of message and key can be processed by this processer. To achieve the high throughput which can reach up to 2.3Gbps, some optimizations such as pre-process, key reusing and two SHA-3 cores cooperation are employed. As a result, this proposed HMAC processor is applicable for a wide range of performance-oriented security systems.

Key concepts: Hash-based message authentication code, Hash function, Message authentication code, Computer science, Secure Hash Algorithm, SHA-2, Cryptographic hash function, Authentication (law)

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