Power-stable code based dpa resistant method realizing on AES cryptographic circuit

This paper proposes a power-stable code based DPA resistant technique for AES encryption circuit. The power-stable code is adopted to stabilize the leaked power consumption of key logic circuit. In this paper, the circuits of Addroundkey is designed with the proposed technique for standard AES algorithm. The real-time power consumption of designed circuits are recorded from oscilloscope. DPA attack is implemented in Matlab and the power analysis shows the power-stable code technique effectively eliminates the peak of differential power consumption waveform which usually appears in conventional AES circuits.