2017Unpublished venueRequires access

High linearity and high gain bulk driven down conversion mixer for UWB system

Gaurav Bansal, Abhay Chaturvedi, Manish Kumar

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Abstract

A high gain and high linear CMOS down-conversion mixer with improved noise figure is presented for Ultra-wideband (UWB) technology. The proposed mixer is designed and simulated using 0.18μm CMOS technology for 3.432 GHz RF input frequency, 3.696 GHz LO frequency and 264 MHz output IF frequency using Key sight Advanced Design System (ADS) tool. The double balanced bulk driven Gilbert mixer architecture is used as a core in proposed mixer. LC Differential matching is used both at the LO switching stages and RF trans conductance stage with R-L-C load as output stage to enhance the conversion gain of the mixer. The bulk driven technique is used for the low power consumption. The proposed mixer provides IIP3 of 20dBm, maximum conversion gain of 10.060 dB, P1 dB of -20.98 dBm and double side-band noise figure (DSB NF) of 0.58 dB. The mixer operates at DC supply of 3.1V with power consumption of 2 mW.

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What this paper is about

A high gain and high linear CMOS down-conversion mixer with improved noise figure is presented for Ultra-wideband (UWB) technology. The proposed mixer is designed and simulated using 0.18μm CMOS technology for 3.432 GHz RF input frequency, 3.696 GHz LO frequency and 264 MHz output IF frequency using Key sight Advanced Design System (ADS) tool. The double balanced bulk driven Gilbert mixer architecture is used as a core in proposed mixer. LC Differential matching is used both at the LO switching stages and RF trans conductance stage with R-L-C load as output stage to enhance the conversion gain of the mixer. The bulk driven technique is used for the low power consumption. The proposed mixer provides IIP3 of 20dBm, maximum conversion gain of 10.060 dB, P1 dB of -20.98 dBm and double side-band noise figure (DSB NF) of 0.58 dB. The mixer operates at DC supply of 3.1V with power consumption of 2 mW.

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Available abstract

A high gain and high linear CMOS down-conversion mixer with improved noise figure is presented for Ultra-wideband (UWB) technology. The proposed mixer is designed and simulated using 0.18μm CMOS technology for 3.432 GHz RF input frequency, 3.696 GHz LO frequency and 264 MHz output IF frequency using Key sight Advanced Design System (ADS) tool. The double balanced bulk driven Gilbert mixer architecture is used as a core in proposed mixer. LC Differential matching is used both at the LO switching stages and RF trans conductance stage with R-L-C load as output stage to enhance the conversion gain of the mixer. The bulk driven technique is used for the low power consumption. The proposed mixer provides IIP3 of 20dBm, maximum conversion gain of 10.060 dB, P1 dB of -20.98 dBm and double side-band noise figure (DSB NF) of 0.58 dB. The mixer operates at DC supply of 3.1V with power consumption of 2 mW.

Key concepts: Frequency mixer, Noise figure, CMOS, Electronic mixer, Radio frequency, Linearity, Wideband, Electrical engineering

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