2017Universiti Putra Malaysia Institutional Repository (Universiti Putra Malaysia)Requires access

Reconfigurable enhanced path metric updater unit for Space Time Trellis Code Viterbi decoder

M. Abu, Harun, Harlisya, Mohammad Yazdi Harmin, Noor Izzri Abdul Wahab, Mohd Khairil Rahmat, Mohd Fairuz Abdul Hamid, Aizat Faiz Ramli

Open publisher page 0 citations

Abstract

Space Time Trellis Code (STTC) encoding and decoding techniques are effective for delivery of a reliable information because of the signal to noise ratio is very small. Even though the Viterbi algorithm is complicated to be designed, these methods typically used large memory space to store the information that have been processed mainly at the Path Metric Updater (PMU). Therefore, an effective memory management technique is one of the key factors in designing the STTC Viterbi decoder for low power consumption applications. This paper proposed the PMU memory reduction technique especially on Traceback activities that usually required a lot of memories for storing the data that has been processed in the past part by using Altera Quartus 2 and 0.18 µm Altera CPLD 5M570ZF256C5 as targeted hardware. Through this method, the reduction achieved at least 66% of memory requirements and 75% improvements in processing time without a significant effects on the outputs results of the STTC Viterbi Decoder for 4-PSK modulation technique by using 50MHz clocks.

About this research paper

What this paper is about

Space Time Trellis Code (STTC) encoding and decoding techniques are effective for delivery of a reliable information because of the signal to noise ratio is very small. Even though the Viterbi algorithm is complicated to be designed, these methods typically used large memory space to store the information that have been processed mainly at the Path Metric Updater (PMU). Therefore, an effective memory management technique is one of the key factors in designing the STTC Viterbi decoder for low power consumption applications. This paper proposed the PMU memory reduction technique especially on Traceback activities that usually required a lot of memories for storing the data that has been processed in the past part by using Altera Quartus 2 and 0.18 µm Altera CPLD 5M570ZF256C5 as targeted hardware. Through this method, the reduction achieved at least 66% of memory requirements and 75% improvements in processing time without a significant effects on the outputs results of the STTC Viterbi Decoder for 4-PSK modulation technique by using 50MHz clocks.

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

Space Time Trellis Code (STTC) encoding and decoding techniques are effective for delivery of a reliable information because of the signal to noise ratio is very small. Even though the Viterbi algorithm is complicated to be designed, these methods typically used large memory space to store the information that have been processed mainly at the Path Metric Updater (PMU). Therefore, an effective memory management technique is one of the key factors in designing the STTC Viterbi decoder for low power consumption applications. This paper proposed the PMU memory reduction technique especially on Traceback activities that usually required a lot of memories for storing the data that has been processed in the past part by using Altera Quartus 2 and 0.18 µm Altera CPLD 5M570ZF256C5 as targeted hardware. Through this method, the reduction achieved at least 66% of memory requirements and 75% improvements in processing time without a significant effects on the outputs results of the STTC Viterbi Decoder for 4-PSK modulation technique by using 50MHz clocks.

Key concepts: Viterbi decoder, Computer science, Viterbi algorithm, Trellis (graph), Space–time trellis code, Decoding methods, Soft-decision decoder, Convolutional code

Related papers

Back to paper searchBrowse research topicsOriginal source
Reconfigurable enhanced path metric updater unit for Space Time Trellis Code Viterbi decoder — Research Paper | ScholarLens