A 12-bit 200KS/s SAR ADC with digital self-calibration
Xiaojie Zhang, Maodong Wang, Liyang Guo, Xinghua Wang
Abstract
Xiaojie Zhang, Maodong Wang, Liyang Guo, Xinghua Wang
Abstract
Aiming at the application of neural signal detection system, this paper designs a 12-bit 200KS/s high resolution successive approximation analog-to-digital converter (SAR ADC) fabricated in SMIC 0.18-μm process. An optimized digital self-calibration technique is proposed to correct the static offset of the comparator and the mismatch of the capacitor array by using a correction capacitor array, achieving 1-bit improvement of ENOB. Simulation results show that, when the input signal is 46K, the ADC fulfills an SNDR of 71.55dB and an SFDR of 91.82dB with a 200KS/s sampling rate, while the ADC only can achieve an SNDR of 65.85dB and an SFDR of 78.83dB before calibration. With the ENOB of 11.59 bit, the self-calibration SAR ADC consumes 336μW at 1.8 V power supply.
OpenAlex reports 3 citations for this work. Citation counts describe recorded attention and do not establish research quality.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
Aiming at the application of neural signal detection system, this paper designs a 12-bit 200KS/s high resolution successive approximation analog-to-digital converter (SAR ADC) fabricated in SMIC 0.18-μm process. An optimized digital self-calibration technique is proposed to correct the static offset of the comparator and the mismatch of the capacitor array by using a correction capacitor array, achieving 1-bit improvement of ENOB. Simulation results show that, when the input signal is 46K, the ADC fulfills an SNDR of 71.55dB and an SFDR of 91.82dB with a 200KS/s sampling rate, while the ADC only can achieve an SNDR of 65.85dB and an SFDR of 78.83dB before calibration. With the ENOB of 11.59 bit, the self-calibration SAR ADC consumes 336μW at 1.8 V power supply.
Key concepts: Effective number of bits, Spurious-free dynamic range, Successive approximation ADC, Comparator, Capacitor, Electronic engineering, Calibration, 12-bit