Request-Size Aware Flash Translation Layer Based on Page-Level Mapping

As more and more flash memory technologies quickly improve, NAND flash memory storage system has become more and more used as a non-volatile storage for embedded applications such as smart phones, smart watch, digital camera and so on. The software layer called flash translation layer (FTL) becomes more important since it is a key factor in the overall flash memory system performance. However, the flash storage system does not perform well because of their hardware feature and the cost of garbage collection. To overcome this limitations, in this paper we provide a novel page mapping scheme named Request-Size aware Flash Translation Layer (RSaFTL) based on the page-level mapping algorithm. Our FTL is designed to reduce garbage collection overhead by using characteristics of overwriting one-page-unit data in flash memory. Experimental results show that RSaFTL outperforms the pure page mapping scheme by up to 29.4% on write-intensive workload with no addition RAM resource.