Design of CMOS instrumentation amplifier with improved gain & CMRR for low power sensor applications

This proposed work reveals a high performance instrumentation amplifier based on operational amplifier (op-amp) for low power applications. This instrumentation amplifier (IA) is designed for low power while maintaining the high gain' high CMRR' low noise as well as other design constraints. The Instrumentation amplifier contains two identical two stage op-amps at the input (gain) stage and one difference amplifier at output stage. By using operational amplifier at the gain stage in saturation region and difference amplifier at the output stage in subthreshold region to achieve high gain and CMMRR. Aspect ratio (W/L) plays very important role in achieving these designing constraints. In this paper our main focus is to achieve high gain and high CMRR with moderate noise and less power performance for modern circuit's applications. The whole instrumentation amplifier schematic is designed and simulated at 180 nm CMOS technology using Cadence Spectre tool. The IA achieve an overall gain and CMRR of 79.16 dB and 98 dB respectively. The comprehensive (overall) power consumed by this instrumentation amplifier design is 409 μW and input referred voltage noise is which is advisable for biomedical signal processing as well as low power sensor applications.