2016Unpublished venueRequires access

Perspectives on system-level MPSoC design space exploration

Andy D. Pimentel

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Abstract

The complexity of modern embedded systems, which are increasingly based on heterogeneous multiprocessor system-on-chip (MPSoC) architectures, has led to the emergence of the field of system-level design and synthesis. To cope with the design complexity, system-level design and synthesis methods aim at raising the abstraction level of the design process. Key enablers to this end are, for example, the use of architectural platforms to facilitate re-use of IP components and the notion of high-level system modelling and simulation. The latter allows for capturing the behavior of platform components and their interactions at a high level of abstraction. As such, these high-level models minimize the modeling effort and are optimized for execution speed, and can therefore be applied during the very early design stages to perform design space exploration (DSE). Such early DSE is of paramount importance as early design choices heavily influence the success or failure of the final product. In this talk, I will provide an overview of the recent advances in our research on system-level MPSoC DSE, such as scenario-based DSE for design-time as well as run-time application mapping, and will present some future challenges that need to be addressed in this domain.

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What this paper is about

The complexity of modern embedded systems, which are increasingly based on heterogeneous multiprocessor system-on-chip (MPSoC) architectures, has led to the emergence of the field of system-level design and synthesis. To cope with the design complexity, system-level design and synthesis methods aim at raising the abstraction level of the design process. Key enablers to this end are, for example, the use of architectural platforms to facilitate re-use of IP components and the notion of high-level system modelling and simulation. The latter allows for capturing the behavior of platform components and their interactions at a high level of abstraction. As such, these high-level models minimize the modeling effort and are optimized for execution speed, and can therefore be applied during the very early design stages to perform design space exploration (DSE). Such early DSE is of paramount importance as early design choices heavily influence the success or failure of the final product. In this talk, I will provide an overview of the recent advances in our research on system-level MPSoC DSE, such as scenario-based DSE for design-time as well as run-time application mapping, and will present some future challenges that need to be addressed in this domain.

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Available abstract

The complexity of modern embedded systems, which are increasingly based on heterogeneous multiprocessor system-on-chip (MPSoC) architectures, has led to the emergence of the field of system-level design and synthesis. To cope with the design complexity, system-level design and synthesis methods aim at raising the abstraction level of the design process. Key enablers to this end are, for example, the use of architectural platforms to facilitate re-use of IP components and the notion of high-level system modelling and simulation. The latter allows for capturing the behavior of platform components and their interactions at a high level of abstraction. As such, these high-level models minimize the modeling effort and are optimized for execution speed, and can therefore be applied during the very early design stages to perform design space exploration (DSE). Such early DSE is of paramount importance as early design choices heavily influence the success or failure of the final product. In this talk, I will provide an overview of the recent advances in our research on system-level MPSoC DSE, such as scenario-based DSE for design-time as well as run-time application mapping, and will present some future challenges that need to be addressed in this domain.

Key concepts: MPSoC, Design space exploration, Computer science, Electronic system-level design and verification, Abstraction layer, Computer architecture, Abstraction, Multiprocessing

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