Dynamic burn-in test of Xilinx Virtext-4 FPGA software application

Master of Science in Electrical EngineeringField Programmable Gate Array (FPGA) technology has introduced and opened new domains in electrical and engineering field due to its performance, reliability, flexibility, long-term maintenance, cost, and time to market.FPGAs have been utilized across most industries such as commercial, military, aerospace, and medical devices.The objective of this project is to establish an automated dynamic test platform to test Xilinx reprogrammable Virtex-4 FPGAs while the FPGA is being stressed (under 125 degree C temperature).This temperature stress test is called burn-in test.Most FPGA resources e.g.CLBs, Block-RAM, DSP… are exhaustively tested.The main goal of burn-in test is to detect defective components at the early stages of their usage by stressing the chips at high voltage and temperatures while the FPGA is powered and performing its customized functions.The unit under test (UUT) is placed inside a chamber while test-vectors are applied through a serial communication (RS-232) to the FPGA board.The test response is compared with an expected golden-copy of the response by an automated software platform.The may lead to detection of possible discrepancy (fault) between the chip on the FPGA board and the expected response (Gold Copy), and associated error in the FPGA is stored into an XML/Database system to generate further report.In this project, all the information is stored in XML (Extensible Markup Language) file format due to benefit such as ability to communicate between different systems, clear defined set of standards, forming a tree structure where it start at the root and branches to the leaves and to the lowest level of the tree.This attribute makes it possible to divide and break hardware specification into smaller pieces of information while keeping track of a logical relationship of all pieces.