2006•Unpublished venueRequires access

Design of Architecture and Instruction-set of RASIP for SDR

Kota Solomon Raju, M. V. Kartikeyan, R. C. Joshi, Chandra Shekhar

Abstract

In this paper, a novel methodology has been presented for designing the architecture and its instruction-set for Reconfigurable Application Specific Instruction-set Processor (RASIP) for Software Defined Radio (SDR). We have described the architectural aspects by giving complete functionality of different modules present in the architecture. Instruction set design for the RASIP for achieving SDR functionality has been described and modeled for proposed architecture. We have introduced new concept of the user-defined instructions that are used for upgradation and modification of existing instruction set after designing the RASIP to incorporate new functionality. This flexibility is essential for any SDR to incorporate new standards in future. The complete system has been modeled in SystemC, which will allow simulation of hardware and software in a single environment. Simulated results of partial instructions of Instruction-Set and complete architecture are presented.

About this research paper

What this paper is about

Why it matters

OpenAlex reports 3 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

Key concepts: Computer architecture, Computer science, SystemC, Instruction set, Flexibility (engineering), Set (abstract data type), Architecture, Reference architecture