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2016•Unpublished venueRequires access

Back enhanced (BE) SOI pMOSFET behavior at high temperatures

Leonardo Shimizu Yojo, Jose A. Padovese, Ricardo C. Rangel, João Antônio Martino

Open publisher page 9 citations

Abstract

This paper reports for the first time the behavior of the new BE SOI pMOSFET at high temperatures up to 125°C. In spite of the conduction mechanism takes place at the back interface in this device, it was obtained an increase of the threshold voltage (up to 1.5 mV/ °C) and a decrease of the transconductance (c-factor up to 1.3) with the temperature increase, which is stronger than the observed for the conventional FD SOI MOSFET. The zero-temperature coefficient (ZTC) was also observed. Furthermore, a simple model was applied to calculate the ZTC bias point, and the model presents a good agreement with experimental data. The body factor is almost negligible within this temperature and the subthreshold slope presents a strong degradation at high temperature.

About this research paper

What this paper is about

This paper reports for the first time the behavior of the new BE SOI pMOSFET at high temperatures up to 125°C. In spite of the conduction mechanism takes place at the back interface in this device, it was obtained an increase of the threshold voltage (up to 1.5 mV/ °C) and a decrease of the transconductance (c-factor up to 1.3) with the temperature increase, which is stronger than the observed for the conventional FD SOI MOSFET. The zero-temperature coefficient (ZTC) was also observed. Furthermore, a simple model was applied to calculate the ZTC bias point, and the model presents a good agreement with experimental data. The body factor is almost negligible within this temperature and the subthreshold slope presents a strong degradation at high temperature.

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OpenAlex reports 9 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

This paper reports for the first time the behavior of the new BE SOI pMOSFET at high temperatures up to 125°C. In spite of the conduction mechanism takes place at the back interface in this device, it was obtained an increase of the threshold voltage (up to 1.5 mV/ °C) and a decrease of the transconductance (c-factor up to 1.3) with the temperature increase, which is stronger than the observed for the conventional FD SOI MOSFET. The zero-temperature coefficient (ZTC) was also observed. Furthermore, a simple model was applied to calculate the ZTC bias point, and the model presents a good agreement with experimental data. The body factor is almost negligible within this temperature and the subthreshold slope presents a strong degradation at high temperature.

Key concepts: Silicon on insulator, Transconductance, MOSFET, Materials science, Subthreshold slope, Threshold voltage, Condensed matter physics, Optoelectronics

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