An Design of the 16-Order FIR Digital Filter Based on FPGA
Jieshan Lin, Shizhen Huang
Abstract
Jieshan Lin, Shizhen Huang
Abstract
At first, this paper analyzes the basic structure and hardware characteristics of the FIR digital filter, and then a design method of the FIR filter is discussed on the basis of the FIR filter structure. It is a method that is based on FPGA, draws the coefficient by Matlab and adopts the pipeline to implete the FIR digital filter. The article focuses on the introduction of the overall framework of the FIR digital filter adopting the finite-state machine as well as the principle of each module of the design. The design is impleted by use of the Verilog hardware description language and each module is verified and simulated by Quartus 8.0 and Modelsim-Altera.
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At first, this paper analyzes the basic structure and hardware characteristics of the FIR digital filter, and then a design method of the FIR filter is discussed on the basis of the FIR filter structure. It is a method that is based on FPGA, draws the coefficient by Matlab and adopts the pipeline to implete the FIR digital filter. The article focuses on the introduction of the overall framework of the FIR digital filter adopting the finite-state machine as well as the principle of each module of the design. The design is impleted by use of the Verilog hardware description language and each module is verified and simulated by Quartus 8.0 and Modelsim-Altera.
Key concepts: ModelSim, Cascaded integrator–comb filter, Finite impulse response, Field-programmable gate array, Half-band filter, Computer science, Verilog, Filter design