Integrating Spiral Inductors on 0.25 um Epitaxial CMOS Process

In this study, different spiral inductor implementations are compared. Q enhancement techniques are also evaluated in minimizing inductor losses on a 0.25 /spl mu/m epitaxial CMOS process. Inductor coupling between adjacent inductors was also considered in this study by measuring the S/sub 21/ parameter between the inductors implemented. Reported structures that minimize inductor coupling and layout strategies are explored in reducing coupling. From measured results, octagonal spiral inductors have higher Qs compared to square spirals. Results from the study have shown that patterned ground shields not only improve inductor Q but also limit inductor coupling. In integrating multiple inductors, a diagonal configuration improves isolation by at least 5 dB when compared to a horizontal configuration.