The implementation of an out-of-order execution floating point unit
Bai Yong-Qiang Luo Min
Abstract
Bai Yong-Qiang Luo Min
Abstract
The prRISC32 FPU (floating-point unit) is a RISC coprocessor for embedded system applications. It supports IEEE754 standard single/double precision floating-point addition, floating-point subtraction, floating-point multiplication, floating-point division, floating-point square root, floating-point/fix-point format conversion, and floating point load/store, etc. It also supports four IEEE compliant rounding mode, and precise exception. It can execute and complete instructions out of order under certain cases. Commercial 0.18/spl mu/m 1P6M standard cell library was used to reduce design time and expense. The prototype chip was operated at about 300 MHz and with the worst-case operating conditions can be operated at about 250MHz in post-route simulation.
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The prRISC32 FPU (floating-point unit) is a RISC coprocessor for embedded system applications. It supports IEEE754 standard single/double precision floating-point addition, floating-point subtraction, floating-point multiplication, floating-point division, floating-point square root, floating-point/fix-point format conversion, and floating point load/store, etc. It also supports four IEEE compliant rounding mode, and precise exception. It can execute and complete instructions out of order under certain cases. Commercial 0.18/spl mu/m 1P6M standard cell library was used to reduce design time and expense. The prototype chip was operated at about 300 MHz and with the worst-case operating conditions can be operated at about 250MHz in post-route simulation.
Key concepts: Floating-point unit, Floating point, Double-precision floating-point format, Computer science, Rounding, Coprocessor, Single-precision floating-point format, Point (geometry)