Experimental implementation of 2ODPA attacks on AES design with flash-based FPGA technology

A successful experimental second order Differential Power Analysis (DPA) on an Advanced Encryption Standard (AES) hardware implementation on flash-based FPGA technology with improved product combining function is achieved. Our choice to this combining function is justified. An experimental set-up is elaborated to implement on an FPGA board critical AES modules and DPA attack. As main contribution, this work proved the success of experimental second order DPA attack on Flash-based FPGA with improved product combining function.