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A Dual-Band Concurrent RF Front-End Receiver design for GPS and Bluetooth Applications

Po-Da Chen, Cheng-Hung Chen, Win-Ming Chang, Kuo‐Hua Cheng, Christina F. Jou

Open publisher page 8 citations

Abstract

This paper presents a new concurrent dual-band radio frequency receiver front-end design that is intended for Global Positioning System (GPS) and Bluetooth applications. A low IF architecture was chosen for low-cost and low-power purpose. Using a dual-band sub-harmonic mixer make this new concurrent dual-band receiver architecture requires only a single frequency synthesizer so the chip area could be reduced. This concurrent frequency synthesizer only needs to provide 0.784GHz and 1.24GHz local frequency signals in this dual-band topology. This receiver is operated at 1.8V, and the simulation shows a voltage gain of 27.7dB at 1.57GHz and 24.2dB at 2.45GHz, a noise figure of 4.13dB at 1.57GHz and 6.84dB at 2.45GHz with a total power consumption of 22.2mW.

About this research paper

What this paper is about

This paper presents a new concurrent dual-band radio frequency receiver front-end design that is intended for Global Positioning System (GPS) and Bluetooth applications. A low IF architecture was chosen for low-cost and low-power purpose. Using a dual-band sub-harmonic mixer make this new concurrent dual-band receiver architecture requires only a single frequency synthesizer so the chip area could be reduced. This concurrent frequency synthesizer only needs to provide 0.784GHz and 1.24GHz local frequency signals in this dual-band topology. This receiver is operated at 1.8V, and the simulation shows a voltage gain of 27.7dB at 1.57GHz and 24.2dB at 2.45GHz, a noise figure of 4.13dB at 1.57GHz and 6.84dB at 2.45GHz with a total power consumption of 22.2mW.

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OpenAlex reports 8 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

This paper presents a new concurrent dual-band radio frequency receiver front-end design that is intended for Global Positioning System (GPS) and Bluetooth applications. A low IF architecture was chosen for low-cost and low-power purpose. Using a dual-band sub-harmonic mixer make this new concurrent dual-band receiver architecture requires only a single frequency synthesizer so the chip area could be reduced. This concurrent frequency synthesizer only needs to provide 0.784GHz and 1.24GHz local frequency signals in this dual-band topology. This receiver is operated at 1.8V, and the simulation shows a voltage gain of 27.7dB at 1.57GHz and 24.2dB at 2.45GHz, a noise figure of 4.13dB at 1.57GHz and 6.84dB at 2.45GHz with a total power consumption of 22.2mW.

Key concepts: RF front end, Bluetooth, Radio receiver design, Multi-band device, Frequency synthesizer, Electrical engineering, Electronic engineering, Computer science

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