Complementary GaAs JFET 16 K SRAM
C. H. Vogelsang, Juan Antonio García Castro, JOHANNES K. NOTTHOFF, G. L. Troeger, J. S. Stephens, R. B. Krein
Abstract
C. H. Vogelsang, Juan Antonio García Castro, JOHANNES K. NOTTHOFF, G. L. Troeger, J. S. Stephens, R. B. Krein
Abstract
A complementary GaAs JFET 16 K SRAM (static random-access memory) with a 4 K*4 organization has been designed, fabricated, and tested. Full functionality of this device has been verified with the GALPAT and marching surround-by-complement patterns. With the surround-by-complement pattern, a worst bit read access time of 22.5 ns has been measured with an average bit access time of 16.1 ns at 678-mW total power dissipation at room temperature. A wafer probe yield of 3% has been obtained.>
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A complementary GaAs JFET 16 K SRAM (static random-access memory) with a 4 K*4 organization has been designed, fabricated, and tested. Full functionality of this device has been verified with the GALPAT and marching surround-by-complement patterns. With the surround-by-complement pattern, a worst bit read access time of 22.5 ns has been measured with an average bit access time of 16.1 ns at 678-mW total power dissipation at room temperature. A wafer probe yield of 3% has been obtained.>
Key concepts: Static random-access memory, Complement (music), JFET, Computer science, Yield (engineering), Wafer, Dissipation, Embedded system