Predicting the Correlation between Analog Behavioral Models and SPICE Circuits for robust SoC Verification

Behavioral modeling of analog circuits is widely advocated and accepted means to speedup mixed-signal SoC level simulations. The validity of these simulation results is contingent on the quality of behavioral models used. This paper presents a verification methodology to establish equivalence of analog behavioral model and the SPICE circuit being modeled. The proposed methodology employs SPICE-on-top co-simulation environment to simulate the behavioral model in the same SPICE testbench that is used for circuit characterization using SPICE simulations. Circuit characteristics/metrics of interest are defined and checkers are developed to measure them. Results from SPICE and co-simulation runs are compared using automated checkers in a regression environment. A dashboard is generated showing PASS/FAIL status for every metric giving an accurate measure of correlation between the SPICE circuit and the behavioral model. These models are leveraged to run thousands of simulations to predict system performance which is not possible using SPICE circuits. This methodology is currently being used at Texas Instruments, Inc. to accurately predict system performance of complex mixed signal products.