2016Unpublished venueRequires access

A floating voltage regulator with output level sensor for applications with variable high voltage supply in the range of 8.5 V to 35 V

Javier Osinaga, Julio Saldana, Wilhelmus Van Noije

Open publisher page 1 citations

Abstract

In this paper we present the design and implementation of a linear voltage regulator using a 0.6μm CMOS high voltage process. The circuit provides a “floating ground” of 5 V below a supply voltage that can vary between 8.5 V and 35V. An additional feature of a voltage level sensor, generating a low voltage signal that advise the state of the regulator is provided by the circuit. The proposed topology, calculations, simulations and measurements of the implemented circuit are exposed in this work. The area of the floating regulator circuit is 599μm × 329μm, the measured output voltage presents a 2.5% standard deviation from the designed voltage.

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What this paper is about

In this paper we present the design and implementation of a linear voltage regulator using a 0.6μm CMOS high voltage process. The circuit provides a “floating ground” of 5 V below a supply voltage that can vary between 8.5 V and 35V. An additional feature of a voltage level sensor, generating a low voltage signal that advise the state of the regulator is provided by the circuit. The proposed topology, calculations, simulations and measurements of the implemented circuit are exposed in this work. The area of the floating regulator circuit is 599μm × 329μm, the measured output voltage presents a 2.5% standard deviation from the designed voltage.

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Available abstract

In this paper we present the design and implementation of a linear voltage regulator using a 0.6μm CMOS high voltage process. The circuit provides a “floating ground” of 5 V below a supply voltage that can vary between 8.5 V and 35V. An additional feature of a voltage level sensor, generating a low voltage signal that advise the state of the regulator is provided by the circuit. The proposed topology, calculations, simulations and measurements of the implemented circuit are exposed in this work. The area of the floating regulator circuit is 599μm × 329μm, the measured output voltage presents a 2.5% standard deviation from the designed voltage.

Key concepts: Dropout voltage, Low-dropout regulator, Voltage regulator, Voltage divider, Voltage, Regulator, Voltage regulation, Linear regulator

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