ARM® Microcontroller Interrupts and Exceptions

This chapter provides general information about exceptions and interrupts occurred and handled in the TivaTM ARM® Cortex®-M4 microcontrollers. All exceptions and interrupts are controlled and managed by a nested vectored interrupt controller (NVIC) in the ARM® Cortex®- M4 system. In TM4C123GH6PM microcontroller unit (MCU), all exceptions and interrupts are handled by the different handlers or interrupt service routines (ISR) based on the exception and interrupt sources. The interrupts are widely applied in all events and peripherals in the TM4C123GH6PM MCU system, but one of the most popular peripherals is the general-purpose input output (GPIO). The major interrupt processing modes and functions provided by the TivaWareTM Peripheral Driver Library and the CMSIS Core package, are discussed and analyzed with some examples. Both the TivaWareTM library and the CMSIS Core package provide a set of API functions to map NVIC-related registers to facilitate the interrupt configuration and processing.