SPI Bus Interface Design of nRF24L01 Based on FPGA

nRF24L01 is a single chip radio transceiver for the world wide 2.4 - 2.5 GHz ISM band, which is used widely in the short distance wireless communication. Parameter configuration, mode conversion, and data transceiver are all programmable through a SPI bus. Maximum data transmission rate of SPI interface is 10 Mbps. However, as the MCS51 series and MCS96series which are applied widely, they are not with SPI interface, and need to extend for the SPI interface. Most of the methods are software expanding which do not play transmission advantage of SPI interface high speed data due to speed limit and have effect on the use and popularization of nRF24L01. This paper adopts the method of hardware to build SPI communication interface, design a master module of SPI bus in the Verilog HDL and greatly improves communication speed and data real-time transmission of the nRF24L01's wireless system. Through simulation by ModelSim, the module was synthesized and implemented in Quartus II, afterward configured and verified on a FPGA development board.